github.com/rizinorg/rz-hexagon commits | Ecosyste.ms: OpenCollective

Fix token patterns for asm strings for PCRE2

7fffb2e47d0942bddaf86811163b2992a6b35751 authored almost 1 year ago

Fix some resource leaks.

dc1c3d7567a633be98f92c9ee9d0bc82e342873a authored about 1 year ago

Add maxargs to cc

992890e12d30693727173d2502142655eeb78242 authored about 1 year ago

Merge pull request #86 from Rot127/dwarf_reg_nums

Generate Dwarf register number table.

c5c141b1ea296a8085d0be2825295444b7916d65 authored about 1 year ago

Merge pull request #85 from Rot127/sys-instructions

Update to LLVM b6f51787f6c8e77143f0aef6b58ddc7c55741d5c

5a73290a42db9c6a0588699ea42cd7b8620f1393 authored about 1 year ago

Generate Dwarf register number table.

4f44bf46ea6646a21a803aa2543d0def4f5e2c27 authored about 1 year ago

Update to LLVM b6f51787f6c8 (new system instructions.)

63087fb934cae8880815dbabac50048a5eaee5de authored about 1 year ago

Merge pull request #80 from Rot127/Hexagon-v7

Generate plugin with instructions for Hexagon v71,v71t,v73.

9bca7913a0b9b663f4b7e684783e9a42f972b034 authored about 2 years ago

Generate plugin with instructions for Hexagon v71,v71t,v73.

d5ca0b985a895e6932c93a141cd25628ac82732a authored about 2 years ago

Merge pull request #79 from Rot127/type-indicators

Add missing type annotations

d817c9b7303d03599a17af6b650d74c5362ae8e4 authored over 2 years ago

Add overlooked type annotations.

d2162538bd8b5b5e795b14b1ee48d4e24ef678b4 authored over 2 years ago

Update test from rizin/#2949

ca8cf1549b260000586d6a021e0550e00e8fb5d9 authored over 2 years ago

Add missing type annotations.

461ff4ba52296c19ffcc9d89b8458e24e5c0a2ac authored over 2 years ago

Merge pull request #78 from wingdeans/master

Add /*<type>*/ comments and fix annotation inconsistencies

21d200770d2b397639a6fe9d26d3b456c56fb39d authored over 2 years ago

Add /*<type>*/ comments and fix annotation inconsistencies

1c7090c2daf8aebe077742250441c0cb4d7371d1 authored over 2 years ago

Merge pull request #77 from Rot127/hexagon-hotfix

Disassemble invalid duplex instructions to `invalid ; invalid`.

395a9f1561a78d047824fe4d49d8901044f26d7f authored over 2 years ago

Disassemble invalid duplex instructions to `invalid ; invalid`.

df0eb969d269641c9060b1d5a3bb8eee65103967 authored over 2 years ago

Merge pull request #73 from Rot127/Remove-duplex

Remove generation of duplex instruction

f3b5154a44fca168456eb7268a05798d54cb4453 authored over 2 years ago

Mark RzAsm/RzAnalysis members as deprecated and fix typo.

55ab5982869690381e391244e162265c67c20eb3 authored over 2 years ago

Initialize `HexInsn` inside `setup_new_hic`. Fixes NULL access.

8c43ec5e7b6f21e715d0eb8fb791f67fe2efcb85 authored over 2 years ago

Fix build error: Use sizeof(`text_infix`) since it is way smaller than `text`

90622f54548c7fc9e54e5e0933b8b25ce2886a9e authored over 2 years ago

Add license information.

695ffac93fced9d8956d5f07544ff3d8a51fe0d7 authored over 2 years ago

Fix: .new registers were not resolved dur to too early return.

e7dd0f409a936f144be3c482229d54592410d306 authored over 2 years ago

Clean up hic->parse_bits use

6e4a1efc86ec23054c3fa63732aec1ff4978293d authored over 2 years ago

Remove duplicate index name.

79efe690c8f3592115a50844cb08087650405c46 authored over 2 years ago

Fix off by one.

0593c0468766a760ee95066a6266909ad8e63eac authored over 2 years ago

Add memcpy for instruction containers

82f217670602fb56a5e7e16287460bda371d3002 authored over 2 years ago

Set instruction address.

d36c12af648c47c247d23b1276eb244237739db2 authored over 2 years ago

Fix segfault if the packet held only the instruction which is currently resolved. `hic->bin.insn` would be NULL in this case.

50e2def594dab5de422cb13d16119565a476144b authored over 2 years ago

Add lookup function to determine sub-instructions for duplex iclass.

0fdfe7ed2e4ee16b34c3621026d8cfa9da8d08e0 authored over 2 years ago

Fix asm tests.

15cfbe51189191fc5d15b7c0e409f99e71d1bec0 authored over 2 years ago

Switch expressions, fix segfault.

3490dd01e6e2dbed76e7e337a7d35e0c4f922d60 authored over 2 years ago

Print number of unhandle ops, if they can not be added to RzAnalysisOp.

00968a18968cd59cea788dba01c3a7af5b6281bb authored over 2 years ago

Give instruction ids enum a type.

dc520ea663c8942e4e6cab90ff71584b81c28be4 authored over 2 years ago

Do HexInsn -> HexInsnContainer transformation in hexagon_disas.c

8db090d4ecc07636223c36d7945bfe50ae8b96e0 authored over 2 years ago

Doc update and some cleanup.

a3fffef74ce76cf34ac0381f4783e7222b7c934b authored over 2 years ago

Introduce function to concatinate container textual disassembly.

46fc782fe6dcc980a958ea14b9f343b05b282b1d authored over 2 years ago

Change HexInsn -> HexInsnContainer in Hexagon_arch

bca3fd34f9a02ac1a4b7f2aca601dfa658ec8717 authored over 2 years ago

Rename `mnem_` to `text_`

e9cd853905c9c0705d692f7b9d973aa5831f0fa4 authored over 2 years ago

Resolve HexInsnContainer <-> HexInsn: for `resolve_n_register`

9656678d9964bdf116c4855e7411392857e52b7f authored over 2 years ago

Split `HexInsn` into `HexInsnContainer` and `HexInsn`.

* This prepares for the disassembly of duplex instructions into separated sub-instructions.

f3d94d2796f7d3ba72f748226f3b8dec1a7f4384 authored over 2 years ago

Give sub-instructions their own template array.

6332226926b1337adc61750c6877baf11d625d31 authored over 2 years ago

Remove Duplex instruction generate code.

702bb12d34eabd0a925e153c3827b9faad24acd3 authored over 2 years ago

Add asm-token code.

daa3fe622379641e6c987ece008e361b3852193f authored over 2 years ago

Merge pull request #72 from Rot127/reloc-test

Add missing reloc test.

39b80ecc73ed26228cbb1729ba8d74f89ce5c11d authored over 2 years ago

Add missing reloc test.

ac1a9486621c5bd45160d7e022d347afba5ffe2e authored over 2 years ago

Add CI linter checks (#67)

Add linter CI tests for
* flake8, black, reuse

Python version to 3.10
* black
* reuse
Upd...

8c26c671eb8bdfe4bceaed65d18189faf0c9e7e2 authored over 2 years ago

Merge pull request #63 from Rot127/Refactor

#52 refactor tasks

2be75aaaba572d2c5ba27e9514edc007426015d9 authored almost 3 years ago

Highlight each black, flake8 and reuse individually.

90a108d2f1c068117ce74a5645e4b4e9f6e81891 authored almost 3 years ago

Revert "Spelling: handwritten -> hand-written"

This reverts commit d0e2d2522f7279ebdf0fc0705aac2afe0821100d.

5488d4c475159c9da8d691459153a4c6cc0dd52e authored almost 3 years ago

Run `black` and remove unused inmport.

d507272db4e5384f2ce37f0d5bb8bdeb0fb23a68 authored almost 3 years ago

Spelling: handwritten -> hand-written

d0e2d2522f7279ebdf0fc0705aac2afe0821100d authored almost 3 years ago

Update license information.

0346b9ab89ac71cf425e63812dcc3776a5203e7c authored almost 3 years ago

Remove Qualcomm Manual System chapter

3bf37ccb1dabb393b15455a83d603470fdf65adb authored almost 3 years ago

Update install and formatting info.

102453fd27b0edece5740d125f762e1292de5c05 authored almost 3 years ago

Uncomment most `log()` calls and decrease verbosity level of them.

b81875ef8da18ff16b7c880721cfe4e73ce4554d authored almost 3 years ago

Move `parse_instruction()` to InstructionTemplate.

e19fbc3d79513fb0c119b95085b415d913a8102a authored almost 3 years ago

Add function to write generated src code to files.

d17430001681cae30e4661262392cc9b28346421 authored almost 3 years ago

Replace `with open("hand-written file")` pattern with `include_file()`

74ae7e5051aa2734a6a684f7c56108221635c423 authored almost 3 years ago

Generate instruction templates as C structs

Any instruction-specific info is now generated as constant C structures,
rather than different e...

1ca78d073861b6ce66b682d200c7a3fc2734a6a3 authored almost 3 years ago

Fix replacement of Rxin operands

Many instructions have a `Rx` operand, followed by `Rxin` later. In such
a case, the re.sub() wa...

55bce242bcac2a202112a2d54b0699a7d9a4c4dc authored almost 3 years ago

Refactor _RzAnalysisOpType assignment

e478a1221f653b42516de476c79b7b37dd01ad72 authored almost 3 years ago

Refactor hi->pred codegen

252eba2033f573c6ef5c8afc200a9bcf5a3eec97 authored almost 3 years ago

Refactor operand parsing code generation

* Op mask is now a data structure instead of final string
* This mask is injected into the Opcod...

2da7fcc7c415f8645e8a6924d2dba0208ae67412 authored almost 3 years ago

Fail safely when too few bytes are provided to disasm (#61)

9343c158ad62d01110e8be951c7828395bc69548 authored almost 3 years ago

Set constant -1 value and type in `hi->ops[]`. (#58)

* Set constant -1 value and type in `hi->ops[]`.
* Set `hi->op_count` = len(`hi->ops`).

2176a43be658045e2014fc5d11c8e2186cd58748 authored almost 3 years ago

Sort imported instruction/register files before processing. (#57)

If not done builds are not reproducible.

7363e5945c93604ef0cca222cd9ca67029cf4d8c authored almost 3 years ago

Merge pull request #56 from Rot127/hexagon-register-profile

Hexagon register profile

366ec26a989dd45eaebcfef3cb4eb6faff3a2b17 authored almost 3 years ago

Remove double registers as possible arguments.

d301be9c94811e04e13852e251121f3bd8813073 authored almost 3 years ago

Fix tests: Use register alias.

83515c7aeff8ba45989e222235a58af940f0c510 authored almost 3 years ago

Enable use of register alias setting.

a43d39db608b5093bd3ec3a30887f18ac27e1965 authored almost 3 years ago

Normalize asm register names.

* Asm names follow the pattern: R1:0, C8, S11:10_tmp
* Alias are: SA0, USR, etc.
* Make hardware...

9141fee5026593c5af218e84e52d3786d989f7e0 authored almost 3 years ago

Update register profile.

* Set correct register types.
* Properly overlap quadtruple/double regs with single regs.
* Add ...

fff9ba064a0702ec716e4bbe501797d456e050cd authored almost 3 years ago

Add config to show register alias.

fb94ffaf8e51d9c5a4fbde7d3356a77b0873a52b authored almost 3 years ago

Merge pull request #54 from Rot127/plugin-conf

Plugin config

35e7b7bc805f693c47284cec9db4324378b66a03 authored almost 3 years ago

Fix asm tests: Set cocrrect sign in asm test.

7413d2aeac786105db64f304681fd06b3060e82e authored almost 3 years ago

Remove unused variable.

3f2d573006360440f8c031295c7b07be1b250d96 authored almost 3 years ago

Remove unused paramter `rz_asm`.

82ab4809a2175352bba83007132c5b19f25a3e1a authored almost 3 years ago

Use plugins RzConfig to determine if immediate hash should be printed.

41086c617b68feee62976747fae7de31772ed413 authored almost 3 years ago

Use plugins RzConfig to determine if numbers should be signed.

7eaa476709c14c3f347a2b4a5ae9aeb654e8d8c4 authored almost 3 years ago

Use plugins RzConfig to determine sdk syntax setting.

5f3cac40f8f77992180cc7682c9a8e95fdf39d6a authored almost 3 years ago

Add RzConfig and node setter to hexagon plugin.

c626722eed33ebbf42146e756f7aa6fdeb1b6af7 authored almost 3 years ago

Merge pull request #50 from Rot127/timestamp

Refresh timestamps only on code changes

d94222c62c0e35a10305d9549e946be383869850 authored almost 3 years ago

Remove unnecessary formatting newlines.

33049b2ce640d6474b566bd145bc06ceaf7e1321 authored almost 3 years ago

Don't write hexagon_disas.c twice if nothing changed.

2414811db02763b27929d05c42fcc60e2f7a410b authored almost 3 years ago

Don't write analysis_hexagon.c twice if nothing changed.

dcc3ef1231515b208ad78a10bafb2a3fa45371c6 authored almost 3 years ago

Don't write hexagon_arch.h twice if nothing changed.

b154893c83dde184e53e70f4a06236d650729a1e authored almost 3 years ago

Don't write asm_hexagon.c and hexagon_arch.c twice if nothing changed.

f96c8bb4a625f8fcfbf00d743558e55b3ad9f85d authored almost 3 years ago

Don't write twice if nothing changed.

75787d21f3b612698fc61881a3a34e67f81c27b0 authored almost 3 years ago

Don't write hexagon.h twice if nothing changed.

69697e8c53eeb2f2f98ff97435e843b0e9a00dad authored almost 3 years ago

Don't add license header to untouched files.

d934f68a2016e2754c9cb466855d8f16ea2b0ecc authored almost 3 years ago

Compare only non blank cahracters.

b55e39bbde451767f234a8f772cbf1d5d1f79574 authored almost 3 years ago

Check for duplicate code gen in .

a5ad794a02b3c8f0d8af702206b6b31b395e805c authored almost 3 years ago

Add fcn to compare old src to newly generated one.

0c3828ecc3139723899b28b0394dcdc4bd3e5a70 authored almost 3 years ago

Merge pull request #47 from Rot127/pkt-syntax

Add Hexagon IDE conforming packet syntax

a123b58840f428b766f411ca7877e46820551338 authored almost 3 years ago

Update timestamps.

9605dd72315878390068d0ad6bcedf5cd5cbd185 authored about 3 years ago

Fix test to exclude RZIL execution.

fb7835d4943c1cf34e02c21ce41be9f9a7ea2e77 authored about 3 years ago

Correct UTF8 intend.

f1d8e01494931ec1e5df42c394de9061af6c9d28 authored about 3 years ago

Enable asm formatting like hexagon-objdump

a97bbf1efab48d47d0b76fbae59644b693842592 authored about 3 years ago

Merge pull request #49 from Rot127/fix-CID-367529

Fix cid 367529

0201fd8f209b7af087c6f4b70f6b14306a81ea99 authored about 3 years ago