github.com/llvm/circt issues | Ecosyste.ms: OpenCollective

[FIRRTL] InferWidths: fix invalid frame reference

youngar opened this pull request 6 days ago

Remove redundant CMakeLists.txt entry

leonardt opened this pull request 7 days ago

[Do not merge][ESI][PyCDE] All necessary changes to support internal BSP

teqdruid opened this pull request 8 days ago

[MooreToCore] Add support for format strings and display task

fabianschuiki opened this pull request 8 days ago

[Sim][NFC] Include InferTypeOpInterface in SimOps.td

fabianschuiki opened this pull request 8 days ago

[Sim] Combine integer formatting ops into one op

fabianschuiki opened this issue 8 days ago

[Verif] Simplify the FormalOp

fabianschuiki opened this pull request 8 days ago

[FIRRTL] Ensure LowerClasses respects alt base path for local paths.

mikeurbach opened this pull request 9 days ago

[FIRRTL] InferWidths: error can point at operation not involved in constraint

youngar opened this issue 9 days ago

[FIRRTL] Print port names attributes if a port has an empty name

rwy7 opened this pull request 9 days ago

[SCFToCalyx] If op with sequential condition

jiahanxie353 opened this pull request 9 days ago

[FIRRTL] collection of changes to InferWidths

youngar opened this pull request 9 days ago

Add unit test discovery and execution tool

fabianschuiki opened this pull request 10 days ago

[JSON] Leave json::OStream in valid state on failure

fabianschuiki opened this pull request 10 days ago

[OM] Update FreezePaths to handle object fields with paths.

mikeurbach opened this pull request 10 days ago

[Calyx] IfOp's group has to be a CombGroupOp?

jiahanxie353 opened this issue 10 days ago

[MooreToCore] Support assert, assume, cover ops

mingzheTerapines opened this pull request 11 days ago

[FIRRTL] InferResets: properly lower FART'd registers

youngar opened this pull request 11 days ago

[FIRRTL] FSRT: not finding all no-reset registers

youngar opened this issue 11 days ago

[FIRRTL] FRT: treats different encodings of register resets differently

youngar opened this issue 11 days ago

[FIRRTL] SFCCompat: can select different values for a single invalid value

youngar opened this issue 11 days ago

[RFC][Sim] Add triggered simulation procedures

fzi-hielscher opened this pull request 11 days ago

[FIRRTL] InferResets FullReset (formerly FART) does not add resets to not reset fields of partially reset registers

jackkoenig opened this issue 11 days ago

[FIRRTL] FART: Does not process modules not reachable from the main module

youngar opened this issue 11 days ago

change github src for slang

astrophysik opened this pull request 11 days ago

[LLHD][HW] Implement SROA interfaces

maerhart opened this pull request 11 days ago

[SCFToCalyx] Memory banking for Calyx

jiahanxie353 opened this pull request 12 days ago

SCF IndexSwitch to nested If-Else

jiahanxie353 opened this pull request 12 days ago

[SCFToCalyx] Build control for nested if operation

jiahanxie353 opened this pull request 12 days ago

[FIRRTL][CAPI] Add documentation

SpriteOvO opened this pull request 13 days ago

[ExtractInstances] Add the extract instances metadata to OM Classes

prithayan opened this pull request 14 days ago

[HWToSMT] ArrayCreateOp and ArrayGetOp support

maerhart opened this pull request 14 days ago

[LLHD][ProcessLowering] Incorrectly inlines aliasing drives

maerhart opened this issue 14 days ago

[HWToSMT] Support hw.array_create and hw.array_get

uenoku opened this issue 14 days ago

[Not-for-commit] Demonstrate Yosys integration

uenoku opened this pull request 15 days ago

[Verif] Lowering from `verif.formal` to `verif.bmc`

dobios opened this issue 15 days ago

[FIRRTL] FIRRTL needs a contract interface

dobios opened this issue 15 days ago

[FIRRTL] Add integer shift left conversion to LowerClasses

maerhart opened this pull request 15 days ago

[FIRRTL] Add integer shift left parser support

maerhart opened this pull request 15 days ago

[OM] Add integer shift left op

maerhart opened this pull request 15 days ago

[FIRRTL] Add integer shift left property op

maerhart opened this pull request 15 days ago

[Seq][Arc] Allow seq.initial to take immutable operands. Add a cast operation

uenoku opened this pull request 15 days ago

[arcilator] Register Verif dialect

owlxiao opened this pull request 16 days ago

[Transforms][OpCountAnalysis] Add PrintOpCountPass

TaoBi22 opened this pull request 16 days ago

[Arc] Fix folding of initialized StateOp

fzi-hielscher opened this pull request 16 days ago

[MooreToCore] Lower moore.net to llhd.sig

fabianschuiki opened this pull request 17 days ago

[FIRRTL] Re-implement old EmitOMIR ports logic in LowerClasses.

mikeurbach opened this pull request 18 days ago

[HW] Automatic HW module partition

SpriteOvO opened this pull request 18 days ago

[FIRRTL] Layers and Analog

dtzSiFive opened this issue 18 days ago

[MooreToCore] Support format strings

fabianschuiki opened this issue 20 days ago

[ImportVerilog] Insert missing conversions around instance ports

fabianschuiki opened this pull request 21 days ago

[ImportVerilog] Support assignment patterns with integer type

fabianschuiki opened this pull request 21 days ago

[ImportVerilog] Add support for $clog2

fabianschuiki opened this pull request 21 days ago

[Analysis] Add OpCount Analysis

TaoBi22 opened this pull request 21 days ago

[FIRRTL] Avoid InstanceGraphNode* in InstanceInfo

seldridge opened this pull request 21 days ago

[ImportVerilog] Add $display/$write/$info/$warning/$error/$fatal

fabianschuiki opened this pull request 22 days ago

Bump LLVM to 556ec4a7261447d13703816cd3730a891441e52c.

mikeurbach opened this pull request 22 days ago

[FIRRTL][LowerLayers] Remove handling of some ref ops

rwy7 opened this pull request 22 days ago

[firtool] Move LowerLayers later in pipeline.

dtzSiFive opened this pull request 22 days ago

[Seq] Add cast operation to immutable type

uenoku opened this pull request 22 days ago

[Seq] Move SeqToSV tests from `test/Dialect/Seq` to `test/Conversion/SeqToSV`

uenoku opened this issue 22 days ago

[SV] [FIRRTL] Add intrinsics for sampled value functions

unlsycn opened this issue 23 days ago

[FIRRTL] Convert CheckLayers to use InstanceInfo

seldridge opened this pull request 23 days ago

[ImportVerilog] Add support for $stop/$finish/$exit

fabianschuiki opened this pull request 23 days ago

[FIRRTL] Add verifier of single MarkDUTAnnotation

seldridge opened this pull request 23 days ago

[ImportVerilog] Add support for elaboration system tasks

fabianschuiki opened this pull request 23 days ago

[MooreToCore] Return early on non-convertable type

maerhart opened this pull request 24 days ago

[MooreToCore] Support assert, assume, cover ops