Ecosyste.ms: OpenCollective

An open API service for software projects hosted on Open Collective.

github.com/llvm/circt

Circuit IR Compilers and Tools
https://github.com/llvm/circt

Documentation on Analyzing Circuits with Python Bindings

tymcauley opened this issue 4 days ago

[RTG][Elaboration] Use malloc instead of IR for virtual registers and labels

maerhart opened this pull request 4 days ago

[RTG][Elaboration] Each virtual register should only be materialized once and every user should use it

maerhart opened this issue 4 days ago

[ImportVerilog]Support real math functions.

hailongSun2000 opened this pull request 4 days ago

[FIRRTL] Disallow reading from property ports

youngar opened this pull request 5 days ago

[ImportVerilog] Fix bit slicing into variables declared with offset

maerhart opened this pull request 5 days ago

[RTG] Add interleave_sequences op

maerhart opened this pull request 5 days ago

[RTG] Custom assembly format for 'rtg.test' operation

maerhart opened this pull request 5 days ago

[RTG] Add the PyRTG frontend

maerhart opened this pull request 5 days ago

[ESI][BSP] Service implementation via selectable engine

teqdruid opened this pull request 6 days ago

[WIP] PrintHWModuleJsonPass

zeyu2001 opened this pull request 6 days ago

[MooreToCore] Branch to resume block instead of wait block

maerhart opened this pull request 6 days ago

[FIRRTL] Add Clock Switch intrinsic

darthscsi opened this pull request 6 days ago

[MooreToCore] Properly handle OOB accesses of moore.extract

maerhart opened this pull request 6 days ago

[HW] Add array_concat of one element folder

maerhart opened this pull request 6 days ago

[COMB] Get rid of "bin" flag in comb.

darthscsi opened this pull request 6 days ago

[circt-verilog] Add LLHD lowering pipeline

maerhart opened this pull request 6 days ago

[MooreToCore] Don't insert wait event checks if all detects are AnyChange

maerhart opened this pull request 6 days ago

[NFC][Verif] Clarify `symbolic_value` semantics

TaoBi22 opened this pull request 6 days ago

[MooreToCore] Crash when getting values to observe

maerhart opened this issue 6 days ago

[MooreToCore] Convert SCF ops inside llhd.process to CF

maerhart opened this pull request 6 days ago

[circt-verilog] Fix negative Rest timing

maerhart opened this pull request 6 days ago

[ImportVerilog] Crash on ordering-methods-reverse test

fabianschuiki opened this issue 7 days ago

[FIRRTL] FART: allow modules to be in multiple domains at once

youngar opened this pull request 8 days ago

[LLHD] Move maxPrimitives check before initializing the 'dontCare' table

maerhart opened this pull request 8 days ago

Add Randomization Logic to Generated Memories

seldridge opened this pull request 9 days ago

[firtool] Add an option to emit HW MLIR into file

uenoku opened this pull request 9 days ago

[FIRRTL] LowerXMR: process all modules

youngar opened this pull request 9 days ago

[ESI Runtime] Pluggable channel engines

teqdruid opened this pull request 9 days ago

[circt-test] Add support for contracts

fabianschuiki opened this pull request 9 days ago

[docs] Add circt-bmc usage information to FormalVerification.md

TaoBi22 opened this pull request 9 days ago

[firtool] Memories are compiled with randomization logic, but not macros

seldridge opened this issue 9 days ago

[MooreToCore] Out-of-bounds moore.extract lowered incorrectly

maerhart opened this issue 9 days ago

[Verif] `verif.symbolic_value` semantics are ambiguous

TaoBi22 opened this issue 9 days ago

[RTG][Elaboration] Malloc unique label values

maerhart opened this issue 9 days ago

[RTG][Elaboration] Malloc virtual register values

maerhart opened this issue 9 days ago

[FIRRTL][LowerToHW] Lower contract ops

fabianschuiki opened this pull request 9 days ago

[FIRRTL][IMDCE] Support operations with blocks

fabianschuiki opened this pull request 9 days ago

[FIRRTL] Fix hasDontTouch crash on non-module block args

fabianschuiki opened this pull request 9 days ago

[FIRRTL] Add contract declaration

fabianschuiki opened this pull request 10 days ago

[Verif] Add ContractOp to Visitor

fabianschuiki opened this pull request 10 days ago

[FIRRTL] Add require and ensure intrinsics

fabianschuiki opened this pull request 10 days ago

[FIRRTL] LowerToHW discards private modules

fabianschuiki opened this issue 10 days ago

[ESI][XRT BSP] Host memory writes

teqdruid opened this pull request 10 days ago

[RTG][Elaboration] Add support for context operations

maerhart opened this pull request 10 days ago

[RTG] Add on_context and context_switch operations

maerhart opened this pull request 10 days ago

[RTG] Add operation to get a random number within a range

maerhart opened this pull request 10 days ago

[RTG] Support partial sequence substitutions

maerhart opened this pull request 10 days ago

[RTG] Separate operation for sequence randomization and randomized sequence type

maerhart opened this pull request 10 days ago

[RTG] Custom parser/printer for sequence op and type for sequence families

maerhart opened this pull request 10 days ago

[circt-test] sby runner doesn't fail if module doesn't exist

fabianschuiki opened this issue 11 days ago

[Verif] Add StripContracts pass

fabianschuiki opened this pull request 11 days ago

[ExportVerilog] Treat verif.contract as no-op

fabianschuiki opened this pull request 11 days ago

[RTGTest] Add the last remaining ops for RV32I

maerhart opened this pull request 11 days ago

[RTGTest] Add integer register type API

maerhart opened this pull request 11 days ago

[RTG] Add label visibility API

maerhart opened this pull request 11 days ago

[RTG] Populate pipeline with new passes

maerhart opened this pull request 11 days ago

[ESI][BSP] Adding byte enables to cosim hostmem

teqdruid opened this pull request 12 days ago

[ESI][BSP] Multiplexing hostmem write clients

teqdruid opened this pull request 12 days ago

[ESI][BSP] Gearboxing the hostmem write path

teqdruid opened this pull request 12 days ago

Firtool and aarch64

timmerrifield opened this issue 12 days ago

[HW] Start of high imedence operations and types

darthscsi opened this pull request 13 days ago

[MemoryBanking] Operation-granularity banking configurations by attaching attributes

jiahanxie353 opened this pull request 13 days ago

[MemoryBanking] Adjust default dimension

jiahanxie353 opened this pull request 15 days ago

[SCFToCalyx] Lower floating point comparison logic fix

jiahanxie353 opened this pull request 15 days ago

[CombToAIG] Add support for div/mod operations

uenoku opened this pull request 15 days ago

[FIRRTL][GC] Fix file separator regex

fabianschuiki opened this pull request 16 days ago

[MooreToCore] Support `moore.array_create`

fabianschuiki opened this issue 16 days ago

[SCFToCalyx] Remove `init_xxx_instance` in `BuildCallInstance`

jiahanxie353 opened this pull request 16 days ago

[SCFToCalyx] Circular dependency between `init_instance` and `instance`'s execution

jiahanxie353 opened this issue 16 days ago

[MooreToCore] Add nested moore.conditional support

AndreyVV-100 opened this pull request 16 days ago

[README] Fix badge link

uenoku opened this pull request 17 days ago

[ESI][XRT] Hostmem service: read side for XRT platform

teqdruid opened this pull request 17 days ago

[ESI][Runtime] XRT support for host memory access

teqdruid opened this pull request 17 days ago

Add passes to strip OM and Emit dialect ops

fabianschuiki opened this pull request 17 days ago

[FIRRTL] GrandCentral: set iface output_file based on parent.

dtzSiFive opened this pull request 17 days ago

[MemoryBanking] Prevent name clashing when two `memref::global` ops have the same shape

jiahanxie353 opened this pull request 17 days ago

[RTGTest] Add store instructions

maerhart opened this pull request 17 days ago

[RTGTest] Add some arithmetic instructions

maerhart opened this pull request 17 days ago

[Pass] Remove unnecessary OperationPass<mlir::ModuleOp>

uenoku opened this pull request 17 days ago

[FIRRTL][IMCP] Overdefine ports of modules with unknown symbol uses

fabianschuiki opened this pull request 17 days ago

[FIRRTL][IMDCE] Don't remove modules with symbol uses

fabianschuiki opened this pull request 18 days ago

[FIRRTL][Inliner] Don't remove modules with symbol uses

fabianschuiki opened this pull request 18 days ago

[FIRRTL] Move GC after AssignOutputDirs.

dtzSiFive opened this pull request 18 days ago

[FIRRTL] Intrinsic documentation: Ports and Direction tables are bit confusing

dtzSiFive opened this issue 18 days ago

[Python] Switch CIRCT Python extension and dialects to nanobind.

mikeurbach opened this pull request 18 days ago

[OM] Preserve non-OM operations in OM LinkModules

uenoku opened this pull request 18 days ago

Bump LLVM to aa580c2ec5eb4217c945a47a561181be7e7b1032.

mikeurbach opened this pull request 18 days ago

[RTG][Elaboration] Support labels

maerhart opened this pull request 18 days ago

[RTG][EmitISA] Support labels

maerhart opened this pull request 18 days ago

[RTGTest] Add branch instructions

maerhart opened this pull request 18 days ago

[Pipeline] Make `reset` signal optional

mortbopet opened this pull request 18 days ago

[SCFToCalyx] Canonicalize `scf::if` at the end of `BuildParGroup`

jiahanxie353 opened this pull request 18 days ago

[ESI] BSP: implement hostmem read path arbiter

teqdruid opened this pull request 19 days ago

[RTG][Elaboration] Support fixed and virtual registers

maerhart opened this pull request 19 days ago

[RTG] More convenient InstructionOpInterface methods

maerhart opened this pull request 19 days ago

Status and getting started

ecstrema opened this issue 20 days ago

[SCFToCalyx] Wrap blocks with scf::ExecuteRegion when creating the new scf::Parallel

jiahanxie353 opened this pull request 20 days ago

[Kanagawa] Remove `%this`

mortbopet opened this pull request 20 days ago

[ESI] Snoop op

teqdruid opened this pull request 22 days ago