Inlines `ibis.sblock` operations, by creating MLIR blocks and `cf` operations, while adding anno...

Broken in da1802f90702b64fac1994ba3bf9a7ec6165f665 .

This already is supported for propassign (object -> anyref),
allow in List/Map expressions as w...

Fixes #6136

This PR restricts the clock gate op to solely use the clock type.

Uses in other dialects, esp...

... by requiring that handshake ops are nested within an operation that inherits the `FineGraine...

Make the `LowerState` pass allow operations to remain in the top-level
`arc.model` op after sta...

Adds a pass to lower operations. Currently, only lowering the boundary and inlining the op body...

Rewrite the access analysis used in the `LegalizeStateUpdate` pass.

This pass is a known perf...

Currently, all the pass base classes are included in all files
implementing one specific pass. T...

Don't use LLVM_ATTRIBUTE_UNUSED on variables, should use either
[[maybe_unused]] or just (void)x.

Don't dedup away modules marked for non-private visibility,
or otherwise can't have their symbo...

Finally convert HWModule*Op over to a unified port representation. This still uses the old prin...

Represents a full appid path. Just a list of AppIDAttrs components and a
root module. Expose to ...

Add the path append op to the OM dialect.
Co-authored-by: Andrew Young <[email protected]>

Known issue: #6130.

This is relatively easy due to my module class refactoring earlier this
year. It's updating the...

Reject if does not target what it should, or is deleted.

The issue causing this to be reverted is now fixed,
re-enable and restore simplification.

Th...

cc #6099.

* Recognize RefSubOp as "aggregate indexer".
* Compute and propagate via FieldRefs into inner (...

Recreates `ibis.block` operations from a CFG. Any `ibis.block.attributes` operations at the pare...

The order of pass and reg operands was incorrect in between the order that block arguments were ...

Hardware designs commonly have a considerable amount of duplicated logic
for parallel execution...

See https://cibuildwheel.readthedocs.io/en/stable/faq/#apple-silicon

This test already passes but seems important to capture that this should work.

`firtool` runs uses OM passes in its pipeline, and registering these passes
enables debugging ut...

This adds the FreezePaths pass which performs the final lowering of path
operations after Export...

These casts are introduced in situations where the type of a value
needs to be opaque. In the E...

See rationale changes for an in-depth description of the why's and how's of this change.

The FIRRTL AnyRef type is converted to an OM Any type, and FIRRTL
AnyRef casts are converted to...

In situations where an object is instantiated and passed to a sink
that expects any reference, ...

foldHiddenReset is a canonicalization that replaces registers driven by only
constants and regi...

* Updated broken reference to mlir/Interfaces/FunctionInterfaces.td

* Fixed remaining issues ...

Now that the Python bindings for ClassType can return a Python object
of the actual ClassType Py...

A relatively new feature of MLIR Python bindings allows returned
MlirTypes to automatically be d...

Don't do this by default, as code reasonably expects the returned
FieldRef has expected type if...

argNames and resNames are redundant with ModuleType. Drop.

This is a follow-up to 668adc5f7a940bfe0f6fe1e88da2172d5bdc3079

FIRRTLFolds eliminates a single connection but it's only legal when the connection is in the sam...

This PR add Evaluator support for Map values.
* EvaluatorValue now takes a MLIR context as a m...

Will be removing the outlined pipeline lowering. It's dumb to have to support two separate, but ...

A channel bundle (sometimes referred to as just "bundle") is a set of channels of associated sig...

Should speed up the CI gate builds. May have to revert this if it
proves too expensive.

This was never used and it adds a bunch of complexity and maintainence
burden. If we want to re...

Down with FunctionType, long live module type. Next step is to remove the name arrays.

This is conceptually similar to Class type, but represents a reference
to any class. It is opaq...

The AnyType is used to represent any valid OM type, without needing to
declare it. The AnyType ...

Drop "imdce-nyi.mlir" test.

Found via warnings like:

```
OpDefinition.h:1679:28: warning: direct base 'SingleBlock<BlockOp>...

These will never appear in the output verilog, and may cause
the wires to be unnecessarily pres...

This is the behavior used for wires, align.

GrandCentral makes use of many of these sorts of ...

The `ibis.block` operation defines a block wherein a group of operations are expected to be stat...

The `ibis.block` operation defines a block wherein a group of operations are expected to be stat...

Handle aggregate_costant op in SFCCompat.

Fixes #6076.

Fixes leaving dead property wires around if they're constant-prop'd through.

...

This adds lowering for extmodule similar to extclasses and module: an
external class declaratio...

Change the BFS of operations used to compute backwards slices in
SVExtractTestCode to, instead, ...

When cloning into new wires, preserve the ref part
(the lowering operates on the base type port...

Insert all materialized constants above marker,
and handle them explicitly.

Don't rely on Co...

Also install the OM linker as part of the minimal firtool installation.
This will be included in...

SSA maximization and merge block insertion are generally applicable transformations and so shoul...

Property wires are added in some scenarios for convenience. This would
be a good canonicalizati...

Fix #6078

Delete top-level operations that are discovered during LinkModules. This
enables the OM linker ...

Signed-off-by: Schuyler Eldridge <[email protected]>

Restore Property Inliner fix/support, but don't use for probes.

Unbreak load-bearing functionality.

AFAIK this change is correct, but it doubles-down on the wi...

Signed-off-by: Schuyler Eldridge <[email protected]>

Signed-off-by: Schuyler Eldridge <[email protected]>

Fix a bug in FIRRTL's BlackBoxReader pass that could manifest if multiple
blackbox inline or bla...