Adds a shift register operation to the seq dialect. The operation has an interface similar to a ...

The pass relies on `seq` items, creating a circular dependency between SV and Seq.
It better be...

Mostly for internal consistency. Also remove some old, unused files.

Create ports in the design hierarchy and wire them up to the correct service. Patch is a bit lar...

This PR refactors HWLegalizeModules to something more like existing lower types passes in order ...

The Map property type was not necessary in the end. A Map can easily
be represented by a list o...

This type wasn't needed after all. We may eventually want some form of
this, but there is no im...

See if this helps with #6395. Update the sccache key to use the full
runner name and not rely o...

While testing some OM IR using the bytecode format, I noticed the
bytecode parser barfed on the...

Absolutely minimal necessary for wiring up services: BundleType.

This reverts commit e49b521e5946e03f8db0b0f16523e0740a638094.

The ops are consumers of clock signals, so the trait is added.
Additionally, the `clock` operan...

Trace recording and playback could be very useful. Could also be used for design introspection a...

Necessary to enable script re-use for non-cosim connections.

Fixed typo in VerilogGeneration.md

No observed cell mapping or (obviously) PPA differences seen.

The macos-latest tag has been migrated to macos-12, and the version of
cibuildwheel we use does...

Start of manifest-based runtime API construction. The manifest is parsed from a string, which co...

Make sure the provided constant attribute's dimensions match the return type.
Essentially a cop...

Make the `ExprEmitter` track whether the current expressions is being
emitted into an assignmen...

In a previous change we generalized the inliner to also be able to inline arcs into other arcs (...

With a recent change upstream to the new `register_operation`
decorators, we accidentally broke...

The short integration test build is a unified build so this is
redundant.

Infrastructure for Python runtime. Loads and parses the manifest.

Add test (and a minor work-around to get it working) testing the CIRCT compiler side of cosim. A...

- Changes terminology: send -> fromHost, recv -> toHost.
- Makes ops and SV unidirectional.
- ...

Have the instance op builder try to resolve any parametric types in the module. If it fails, fal...

This PR changes the HW StructExtract, StructInject, UnionCreate and UnionExtract ops to referenc...

This PR changes the conversion patterns for shift operations, which should result in defined beh...

Refactored `emitDims` to support both styles of printing dims.

- Symbol-defining operations nested within `ibis.class` and `ibis.container` ops are now declare...

Recently, arc operations where updated to use the `!seq.clock` type
instead of `i1` values. How...

This is a fix for an issue introduced by llvm-project:a21abc7 via
b895069. The alignment in LLV...

CompressedModuleOp lowers to an instance of the Cosim_Manifest external module.

This reverts commit 0d7e4033ffbf890be722e4bb392971688f5fa7a3, which
breaks reversability of FIRR...

Add a regression test to ensure bitcasts are no-ops and are their own
proper reverse.

Add RPC call and corresponding DPI/RTL for getting the compressed accelerator manifest.

In order to use the types in Python with isinstance, etc., we need to
provide the mlir_type_sub...

* [Ibis] Mark all not-illegal ops as legal

* add test

---------

Co-authored-by: Morten ...

Now accepts --sim which merely gets passed through to circt-rtl-sim.py.

Fixes Windows build

Intended so different BSPs can easily lower this to various hardware
implementations. Op seriali...

Simplifies the CIRCT proper build. Also mitigates a runtime binary distribution problem by requi...

The inclusion of "circt/Dialect/MSFT/MSFTDialect.h" included
"llvm/Support/type_traits.h" whi...

Paths can be used to create lists, and when paths are frozen the list
create ops will have the ...

This turned out to be a bad idea. We're still using Cap'nProto for Cosim, just with the message ...

Delete stuff regardless of whether or not they're being used. There
shouldn't be any users by now.

The dialect conversion framework tries to legalize everything touched by
a pattern, not just thi...

Adds new op for designers to attach metadata to any symbol.

Add the `DebugAnalysis` which marks values and operations that only feed
into debug info. This ...

Serialize the IR representation into JSON as part of the manifest.

Add an argument to the callback of walkGroundTypes to indicate if the ground type is flipped.
T...

This PR adds a new pass called `Lint` to the `FIRRTL` pipeline, that checks for
operations tha...

Mirrors the AppID index hierarchy. Clone manifest data into it.

Some ops have an AppID as an inherent attribute. This (along with the
`getAppID` function) cove...

When running the service connection pass, leave a record of the original designer intent. Will b...

Move the `-g` option from `firtool` the tool to `Firtool` the library.
See discussion in #6309.

Add the `MaterializeDebugInfo` pass, which creates debug ops to track
FIRRTL-level ports, nodes...

This makes for far more sensible hierarchies. Also makes the index field of AppIDs optional.

When traversing the IR in the `DebugInfo` analysis, consider
`dbg.variable` operations when pop...

This PR factors out some of LowerAnnotation helpers to a header and introduces registerAnnotatio...

In the case we need need to make a new NLA for an instance that has
moved past the module at wh...

This change adds evaluator support for frozen paths.

Two new EvaluatorValues have been added,...

At the moment the FIRRTL-to-HW lowering removes zero-width values
everywhere. This works as long...

Co-authored-by: Mike Urbach <[email protected]>

Add the `dbg` dialect, alongside a rationale document, basic types, and
the three essential `db...

Fix #6316

Add a comment as to why the constant 'z is generated for plusArgValue
intrinsics. This constant...

Fix a bug where a walk was deleting operations. Change this to delay the
deletion until the wal...

Change LowerToHW to not emit an uninitialized register in the
SYNTHESIS-defined path when lower...

Services now only support bundle ports. Bundles pretty significantly simplify services at the ex...

Fix https://github.com/llvm/circt/issues/6303

- Builders
- Printing should never fail

This functionality will be replaced at some point with a more holistic
scheme.

This functionality will be revived at some point.

If an instance's Verilog name differs from the debug info instance name,
add an additional `hdl...

An ESI system manifest is intended to describe the parts of a particular
accelerator which may ...