This commit replaces muxcell2/muxcell4 with mux2cell/mux4cell since
"MUX2 cell" seems to be a mo...

We mostly just want the installed copy of LLVM,
so extract the single build file required and n...

Update these as operations that cannot have types inferred
from inputs, drop (incomplete) code ...

Fix https://github.com/llvm/circt/issues/5424. `'{..}` is used to emit packed constant arrays bu...

This commit adds minimal changes BaseTypeAliasType for base type alias.
Implement mlir parser/p...

This commit adds intrinsics (int.muxcell4, muxcell2) for directely representing 4-wide and 2-wid...

Noticed in diagnostic produced here: https://github.com/llvm/circt/issues/5441 .

'srcs' seems to already be used now, but wasn't a few weeks back

The `seq.fifo` operation intends to capture the semantics of a FIFO which
eventually map to som...

* Ensure the ControlFlow dialect is registered in the context where needed and linked against (n...

This adds support for enumeration types to `getFieldName`, which is
commonly used to print the ...

Don't #include C++ headers which provide access to MLIR/CIRCT classes
which shalt not be used.

The circt/support/LLVM.h include should never have been there, since
this opened the door to C++...

We currently go through the CAPIs in our Python bindings, and this
code shouldn't be using C++ A...

Add a `truth_table` to mux tree lowering to the LowerComb pass.

Some operations in the comb dialect (e.g. comb.truth_table) are not directly supported by Export...

External modules with parameters were being instantiated without the
parameters.

Absolute paths break PyCDE (and theoretically any other lib which embeds
CIRCT in its own names...

Primary motivation is to fix header-gen dependence
(before this change, this includes header be...

Fixes #5425.

This was on the module, but similarly don't erase
the IR until after removing f...

This function just needs an ArrayRef, just pass in {op1, op2}.
(no need for a smallvector...)

S...

This commit adds a lowering of DC operation to a combination of
`comb,seq` and `hw` operations....

`ext` inputs are inputs which are accessible in any pipeline stage, and which will never be regi...

Adds a bunch more verification to the `pipeline.scheduled` and `pipeline.latency` ops, as well a...

Currently, the MacOS jobs cannot succeed, but that shouldn't block the
Linux jobs. In general, i...

After classes are extracted from FIRRTL modules, the property ports of
the module are removed. ...

I've found that 0xFFF is not enough to always produce unique strings
for constraints I'm debugg...

Co-authored-by: Nandor Licker <[email protected]>

Simple 2-state truth table, just as discussed in the ODM a while back. Lowering to something use...

Only need InstanceGraph, so don't bother computing the paths.

Drop lookupInstNode, `InstanceG...

Serves me right for not testing on a branch first.

The GCC/Release/Valgrind corner has been failing for some time #5253.
Disabling it until someone...

Add API to get the field names from an object and add a convenient iterator.

CheckCombLoops has replaced this for some time now.

Code lives on in version history if needed.

Fix #5408.

Unfix #5391.

This partially reverts commit 6c013204bdc32e836d204bec40d2edb47ddc...

Follow up to bb14a6ffa9c1cc388b3c608f74a1f88ef555363d

This fixes a small bug that alias-awaret type casts are not recursively
applied.

This commit adds ODS class `FIRRTLDialectTypeHelper ` which inherits
FIRRTLDialectType to reduc...

Modules with input or output properties are converted to OM
classes. The input properties becom...

As mentioned in https://discourse.llvm.org/t/preferred-casting-style-going-forward/68443 and htt...

Fix upperBoundSolution being set from bool indicating if cycle,
instead of the value solved for...

This API previously accepted a Python dataclass as input, and used it
as a template to guide th...

Now that `getBaseType` handles all types, there is no need for
`getBaseTypeOrNull`.

Add the `ExternalizeClockGate` pass which converts all `seq.clock_gate`
ops in a design into in...

Teach emitConnect to insert ref.cast as needed.

Better support literal and literal/const-derived sources to "force", and use ref.cast to accommo...

Add parsing support for FIRRTL 2.4.0 radix-specified integer literals.
These are an alternative ...

This adds a new type to the FIRRTL dialect, BigInt. A BigInt is a
signed integer of arbitrary ...

This change adds support for property types to CheckCombLoops. Right now
property types show up...

This changes InferWidths to use a common pattern to filter out foreign
and property types. The...

IMCP uses a helper `walkGroundTypes` to iterate over all the leaf
elements of a FIRRTLType. Th...

Lower the `firrtl.int.clock_gate` intrinsic to a `seq.clock_gate` op.

Signed-off-by: Schuyler Eldridge <[email protected]>

This adds a helper similar to getSingleConnectUserOf, except for
PropAssignOp instead of Strict...

Removes the notion that `pipeline` pipelines can be either latency insensitive or sensitive.
Th...

The `pipeline.latency` operation represents an operation for wrapping
multi-cycle operations. T...

This signal is intended to connect to all stages within the pipeline, and is used to stall the e...

No property types have inferable widths, so we need to teach
InferWidths to gracefully ignore t...

Change how the FIRRTL version is threaded through each of the different
FIRRTL parsers. Make th...

Signed-off-by: Schuyler Eldridge <[email protected]>

Per spec, need to allow define'ing refs into destinations that are less
inferred than their sou...

This adds verifiers which:
1. check that a source is not a destination.
2. check that a sink i...

This change adds initialization checking of Property typed ports to the
ExpandWhens pass. This...

No known issues here but keep these up-to-date,
may be important if the operation* is re-used.
...

Don't leave to verifier, better diagnostic this way.

This adds a new statement to FIRRTL to assign a property to a property
sink. We stop allowing ...

Closes #5360

This commit refactors the pipeline dialect to be block-based. This brings a major representation...

Fix #5356. There is an edge case that ETC wrongly erase an extracted operation which is still us...

Preserve instances of external modules in the arcilator pipeline rather
than removing them and ...

Fix an issue in `InferMemories` where the computation of the write mask
would produce a byte-rev...

Add support for more detail read latencies to the `InferMemories` pass.
It now supports a pre-st...

Make the `InferMemories` pass optionally add taps on all memory input
and output ports. Enable t...

Include the `InferTypeOpInterface.td` file in `SeqOps.td` which
magically creates more builders ...

* fix issue #5284 and #4814

* add collect Op comments and test case

* add check for shared...

On one design (-Odebug), ETC was taking 600s / 1100s total,
after this change only takes ~20s.
...