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github.com/AcheronProject/Athena

Athena is a "universal" TKL PCB powered by STM32 MCUs
https://github.com/AcheronProject/Athena

Edit component metadata

d6aa2dc904c7e9422b9424e873f85362dea2238f authored over 2 years ago by Gondolindrim <[email protected]>
Update PCB with metadata

96cc122403b42807a2f8ef9dbb26ce894b1c2f67 authored over 2 years ago by Gondolindrim <[email protected]>
Edit component metadata

5d2c7e5af073ccc5e1214cf0cf38979593b7866f authored over 2 years ago by Gondolindrim <[email protected]>
DRC ran, errors corrected. Added outline cuts for H87/88 compatibility

5970a4ea35fde79a37ec027f305fcbaf1d3f8f28 authored over 2 years ago by Gondolindrim <[email protected]>
New label

bc5c06b77a2f90988b0d621d18e882845b289a13 authored over 2 years ago by Gondolindrim <[email protected]>
Remove RC1 from label

8dc540db98a46bae054cdfcdbb30c0fd4d0f3b0c authored over 2 years ago by Gondolindrim <[email protected]>
Move top row resistors

2db73a4391dffc9169386dbe39039ea11a7ba6f1 authored over 2 years ago by Gondolindrim <[email protected]>
Edit component metadata; prepare for release

39cbcffa64feaec7ac1330a87754b8f3af3c6f1c authored almost 3 years ago by Gondolindrim <[email protected]>
RGB translator change

RGB translator changed from SC-70-6 version to SOT-563 due to JLC shortage of the former

af31f4c139f1d754a9b684e21bdebaa233edd42e authored almost 3 years ago by Gondolindrim <[email protected]>
Edit component metadata

45b8fba6823565b0654ffc866f940c12bb7084b4 authored almost 3 years ago by Gondolindrim <[email protected]>
DRC corrections, metadata add

- Added LCSC number for missing components
- DRC corrections: diodes courtyard overlaps

73f79c3c395620c77c0d753130246e121ba2e8b4 authored almost 3 years ago by Gondolindrim <[email protected]>
Add metadata to components

b920e64f2b4bef043a514f0011a39c933e7c97a4 authored almost 3 years ago by Gondolindrim <[email protected]>
More DRC corrections

ecdc6c5b6bd2629c269389f0b6ecf7111a461de4 authored almost 3 years ago by Gondolindrim <[email protected]>
Corrections for some DRC issues

4611301831aa79ac5cafdb7d269489c0f857a8eb authored almost 3 years ago by Gondolindrim <[email protected]>
Start porting design to JLCPCB-compliant parts

2144523364a8f68ef6f2b8ed3dd7ba47f6700303 authored almost 3 years ago by Gondolindrim <[email protected]>
Trace improvements

06467bce3623296036ae72d6ff6e65b829c464c4 authored almost 3 years ago by Gondolindrim <[email protected]>
Move 2nd row LED resistors for better grounding

e043f3532f51e799a28ff48e15af15568c9584be authored almost 3 years ago by Gondolindrim <[email protected]>
DRC, RGB pins

- DRC ran, small errors corrected
- RGB out pins from RGB DB JST connector were broken out
- 2.0...

9fc304e378873c503289d251b119d567cc31f3f4 authored almost 3 years ago by Gondolindrim <[email protected]>
New label for rev beta

c1c56726d25c7d0bde39dc9464a24a2f02b5ddcd authored about 3 years ago by Gondolindrim <[email protected]>
Add label to extra pins; 3V3 pour integrity adjustments

7865633cf7c8e8ddd1729885451767f0309a0f50 authored about 3 years ago by Gondolindrim <[email protected]>
New tag

3a7f789d330a0c72db0e558d4b472bc559ab54db authored about 3 years ago by Gondolindrim <[email protected]>
Adjust USB 5V routing

7a16a774f6dddbf47427128e71a3885db082e0bf authored about 3 years ago by Gondolindrim <[email protected]>
Finish adding extra pins

69b1099290922b9ecb303f65be7c3caa48efa23a authored about 3 years ago by Gondolindrim <[email protected]>
Add some extra pins

6a2a865db648f5e20cdce43f89becc0c9eb56af9 authored about 3 years ago by Gondolindrim <[email protected]>
Update libs, route extra pins

ee3030ef4180d3bff16b6dd4a9a6ec785305f532 authored about 3 years ago by Gondolindrim <[email protected]>
Better grounding on top row

- Moved traces and components for grounding pour integrity

26c86a573407a0c004dc7f44049ae90673c12e28 authored about 3 years ago by Gondolindrim <[email protected]>
hange LDO caps to MLCC

7b16f44aadf26d27e3c36b7a2ea07aa87f9d5c2f authored about 3 years ago by Gondolindrim <[email protected]>
Grounding improvements

- Grounding around MCU USB traces and connector was improved
- For this, a couple traces were mo...

4618c442382abdca5c069afde769ce64016ca1ec authored about 3 years ago by Gondolindrim <[email protected]>
Start porting to 64 pin MCU

b0ff7a7c7d7fa9d8a9ba4a8bf02d35b791cab9ed authored about 3 years ago by Gondolindrim <[email protected]>
a-RC1 label, digital transistors

- Label was changed to Alpha-RC1 version
- Instead of relying on MCU open-drain pins, discrete d...

57f2f974dfa42d7c06f2b869a4a58e2384991b88 authored about 3 years ago by Gondolindrim <[email protected]>
Re-routes, optimizations, corrections

- Re-routed rows R4 and R5; SWCLK pin confirmedly works as row pin as tested on pre-revision Alp...

2bb43c2b709285c084585ca8eac7b7a8a7b477a6 authored about 3 years ago by Gondolindrim <[email protected]>
Update README

47f2c4f5b47f4c5d44bb565c2e076ba48a8076e9 authored about 3 years ago by Gondolindrim <[email protected]>
Update README

b0e45aa0723355fe5e1a45dfd8e8395613055183 authored about 3 years ago by Gondolindrim <[email protected]>
Update component metadata

1a282a571a4a9bc8b397a370bf030776d8b14f70 authored about 3 years ago by Gondolindrim <[email protected]>
Finish documenting outlines

c7c9de9a69a8768b67f1957375bcdbce88e15f2c authored about 3 years ago by Gondolindrim <[email protected]>
Documented outline, DRC

- Outline is now B87-based and contains gummy mount holes all througout the layouts. Outline is ...

63e2c1cc9187e280e537b8364c2cb8bbb1fff5d6 authored about 3 years ago by Gondolindrim <[email protected]>
Implement B87X2 outline

e66c7354076e08a4e2fe6799de687555d77191d9 authored about 3 years ago by Gondolindrim <[email protected]>
MCU circuit topology, QOL updates

- Both RCC resistors for USB are now in the bottom layer
- DRC ran again, no errors found
- Chan...

8875427951e416db297efc7504d473acfeaa81c0 authored about 3 years ago by Gondolindrim <[email protected]>
Add warning signs, DRC ran, errors fixed

131975f6ee55ef50616ecca1808025c41f26ca37 authored over 3 years ago by Gondolindrim <[email protected]>
Added logos, some DRC

398d1ecd0999eb523c1015ed115e80176f9d4119 authored over 3 years ago by Gondolindrim <[email protected]>
More routing, DRC and post-routing pending

b2f63ed92f328759228df882a7efc7d223885f46 authored over 3 years ago by Gondolindrim <[email protected]>
Routing work, USB DB sketch

c87ab727bf886782e0c18b831f2378d5cdca9bbf authored over 3 years ago by Gondolindrim <[email protected]>
Routing work

27a0ba55e81878523d16958d4b2fe821f467e618 authored over 3 years ago by Gondolindrim <[email protected]>
Update submodules

dcb39e5d5d0c170b14e127a92e9d88c5584b4723 authored over 3 years ago by Gondolindrim <[email protected]>
Acheron Setup port, joker topology

- Tolerances and constraints were updated to Acheron Setup's defaults
- New MCU "joker" topology

b0bf31434bd72a0f6caee5fd349407dc8de0c5a4 authored over 3 years ago by Gondolindrim <[email protected]>
Route first row and most USB, add LEDs

a692cdc1e93af3de7048335601c96f3cc23254c2 authored over 3 years ago by Gondolindrim <[email protected]>
Added Athena logo

0e07cca8c7fcd54de6c28ef7035f20a113038c87 authored over 3 years ago by Gondolindrim <[email protected]>
Further developments

- Define PCB edges
- Place switches and layouts
- Place USBC connector

2a775d4f10852ec5537b573efa51ab6af522e869 authored over 3 years ago by Gondolindrim <[email protected]>