github.com/swiftwasm/swift-llvm commits | Ecosyste.ms: OpenCollective

[InstCombine] add tests for logic of NaN fcmps; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356287 91177308-0d34-0410-b5e6-96231b3b...

cb6ed662f06201d92279a9958008d36f25ca9fde authored almost 6 years ago by Sanjay Patel <[email protected]>

[ConstantRange] Try to fix compiler warnings; NFC

Try to fix "ignoring return value" and "default label" errors on
clang-with-thin-lto-ubuntu buil...

5ac2b03ffe877f457594dc3b3c80e02df748a7d2 authored almost 6 years ago by Nikita Popov <[email protected]>

[tests] Add a test for constexpr mask as requested in D57372

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356285 91177308-0d34-0410-b5e6-96231b...

f54c916764e434feb3defd46e4e771510c12d454 authored almost 6 years ago by Philip Reames <[email protected]>

[InstCombine] add tests for masked store/scatter; NFC

Baseline tests for D57247

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356283 91177...

915dcbebc0026172533a29098707f443b3a9d2c4 authored almost 6 years ago by Sanjay Patel <[email protected]>

[AArch64][GlobalISel] Regbankselect: Fix G_BUILD_VECTOR trying to use s16 gpr sources.

Since we can't insert s16 gprs as we don't have 16 bit GPR registers, we need to
teach RBS to as...

9daee5ff7bc52be70db3f78af3312e78439a1001 authored almost 6 years ago by Amara Emerson <[email protected]>

[X86][GlobalISEL] Support lowering aligned unordered atomics

The existing lowering code is accidentally correct for unordered atomics as far as I can tell. A...

4c013b3a56ed31dc2bd880a3256ab676f0b37e9d authored almost 6 years ago by Philip Reames <[email protected]>

[BPF] handle external global properly

Previous commit 6bc58e6d3dbd ("[BPF] do not generate unused local/global types")
tried to exclud...

a7717b7c82002fd47e5154307487e38b9c465dc1 authored almost 6 years ago by Yonghong Song <[email protected]>

[ConstantRange] Add overflow check helpers

Add functions to ConstantRange that determine whether the
unsigned/signed addition/subtraction o...

a189aac68af392a70225102e6847a794f6a68830 authored almost 6 years ago by Nikita Popov <[email protected]>

[AArch64] Regenerate build vector tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356274 91177308-0d34-0410-b5e6-96231b3b...

49abaf8b81434e54705983ca44c6704e91160e90 authored almost 6 years ago by Simon Pilgrim <[email protected]>

[SelectionDAG] Add SimplifyDemandedBits handling for ISD::SCALAR_TO_VECTOR

Fixes a lot of constant folding mismatches between i686 and x86_64

git-svn-id: https://llvm.org...

4c0f218c933627de5f889ffe0869485c98cebc3c authored almost 6 years ago by Simon Pilgrim <[email protected]>

[LLVM-C] Expose the "Add Discriminators" Pass To LLVM-C

Summary: Add bindings to create a wrapped "Add Discriminators" pass. Now that we have debug inf...

28a7a3055b13d88daa1f5a12e22285eaa51425e5 authored almost 6 years ago by Robert Widmann <[email protected]>

[X86] Add SimplifyDemandedBitsForTargetNode support for PINSRB/PINSRW

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356270 91177308-0d34-0410-b5e6-96231b3b...

827df5124c4b3acef526bf6e4eb6d3fdb196c502 authored almost 6 years ago by Simon Pilgrim <[email protected]>

YAMLIO: Improve endian type support

Summary:
Now that endian types support enumerations (D59141), the existing yaml
support for them...

1228ed302f315601c1b54195d6f56dcd651429a9 authored almost 6 years ago by Pavel Labath <[email protected]>

[ThinLTO] Restructure AliasSummary to contain ValueInfo of Aliasee

Summary:
The AliasSummary previously contained the AliaseeGUID, which was only
populated when re...

fdb5c575767cc77f99bfa7e7850c59a50e44c95e authored almost 6 years ago by Teresa Johnson <[email protected]>

[Hexagon] Remove icmp undef from reduced tests

Pre-commit for D59363 (Add icmp UNDEF handling to SelectionDAG::FoldSetCC)

Approved by @kparzys...

8026cb199281617f9bed52e1a213002495d37880 authored almost 6 years ago by Simon Pilgrim <[email protected]>

[llvm] Skip over empty line table entries.

Summary:
This is similar to how addr2line handles consecutive entries with the
same address - pi...

b472d69521747677c12f3d04ed31d9fa8e3272be authored almost 6 years ago by Mircea Trofin <[email protected]>

[CodeGenPrepare] avoid crashing from replacing a phi twice

Summary:
This is a fix to bug 41052:
https://bugs.llvm.org/show_bug.cgi?id=41052

While trying t...

bc7dbf662a6574984e79e33331bbb1c80b4b5c7b authored almost 6 years ago by Mikael Holmen <[email protected]>

[ARM] Remove EarlyCSE from backend

There is an issue with early CSE hitting an assert, so temporarily
remove the pass from the ...

7eaac1c18c01ab6178825864893cd9a7d1376fd5 authored almost 6 years ago by Sam Parker <[email protected]>

[AMDGPU] Fix SGPR fixing through SCC chaining

Summary:
- During the fixing of SGPR copying from VGPR, ensure users of SCC is
properly propag...

d82dbd63a346b4f7e72264ef34082302a550ccbc authored almost 6 years ago by Michael Liao <[email protected]>

[LSR] Update test from rL356256 after rebase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356257 91177308-0d34-0410-b5e6-96231b3b...

58cac675168a99ef37bb4aff7df7206f74fad102 authored almost 6 years ago by Florian Hahn <[email protected]>

[LSR] Check for signed overflow in NarrowSearchSpaceByDetectingSupersets.

We are adding a sign extended IR value to an int64_t, which can cause
signed overflows, as in th...

f75dbeb8e7dfbf8a512fa08f4c25509dae63b310 authored almost 6 years ago by Florian Hahn <[email protected]>

[SPARC] Regenerate label test for D59363

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356253 91177308-0d34-0410-b5e6-96231b3b...

1154d31e8c429e53307d3fc0edd13d9b261c26dc authored almost 6 years ago by Simon Pilgrim <[email protected]>

[ARM] Remove icmp undef from reduced tests

Pre-commit for D59363 (Add icmp UNDEF handling to SelectionDAG::FoldSetCC)

Approved by @efriedm...

13f8e3c482f6d13663317efd4537939cb42d89af authored almost 6 years ago by Simon Pilgrim <[email protected]>

[WebAssembly] Remove icmp undef in stackify test

Pre-commit for D59363 (Add icmp UNDEF handling to SelectionDAG::FoldSetCC)

Approved by @tlively...

7ff5698239952c5f0d3bc038ba90c3b82641d1ba authored almost 6 years ago by Simon Pilgrim <[email protected]>

[X86][SSE] Attempt to convert SSE shift-by-var to shift-by-imm.

Prep work for PR40203

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356249 91177308-...

72299d0b1dfe5f94e8ae266ecebf6a6aaac6fed2 authored almost 6 years ago by Simon Pilgrim <[email protected]>

[llvm-profdata] Deleted unused Cutoffs added by D16005

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356248 91177308-0d34-0410-b5e6-96231b3b...

af0a8f8949da53fc8b8f2ed969f4f8d3ddaf1593 authored almost 6 years ago by Fangrui Song <[email protected]>

[yaml2obj]Allow explicit setting of p_filesz, p_memsz, and p_offset

yaml2obj currently derives the p_filesz, p_memsz, and p_offset values of
program headers from th...

24ee1c697ffb927a8c4996fd3076d7cd1e053a11 authored almost 6 years ago by James Henderson <[email protected]>

[llvm-readobj] Delete unused variable. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356246 91177308-0d34-0410-b5e6-96231b3b...

0fb767925397f1dda213d4c01e5e332f07f32af9 authored almost 6 years ago by Fangrui Song <[email protected]>

[llvm-objcopy] Delete unused parameter from replaceDebugSections. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356245 91177308-0d34-0410-b5e6-96231b3b...

c2226fc117edec7923f11574e1aad1217f795b51 authored almost 6 years ago by Fangrui Song <[email protected]>

[llvm-objcopy] Don't use {}; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356244 91177308-0d34-0410-b5e6-96231b3b...

85356e1a664f16609872e53a1e74064f53d1ea47 authored almost 6 years ago by Fangrui Song <[email protected]>

[ARM][ParallelDSP] Disable for big-endian

Bail early when we don't have a preheader and also if the target is
big endian because it's writ...

42dcf561227482cbc408e475ea9bd230cb9488e2 authored almost 6 years ago by Sam Parker <[email protected]>

[MIPS GlobalISel] Improve selection of constants

Certain 32 bit constants can be generated with a single instruction
instead of two. Implement ma...

20744f0b1f336b4d82706a38ea2706be154d9791 authored almost 6 years ago by Petar Avramovic <[email protected]>

Propagating prior merge from 'llvm.org/master'.

63dab86f3055d1054e7a88fd76807600bbbe71b7 authored almost 6 years ago by Automerger <Automerger@Swift>

[BPF] do not generate unused local/global types

The kernel currently has a limit for # of types to be 64KB and
the size of string subsection to ...

6bc58e6d3dbd6950962f2b30169dadc5b2eb3b8e authored almost 6 years ago by Yonghong Song <[email protected]>

Revert "[BPF] do not generate unused local/global types"

This reverts commit r356232.

Reason: test failure with ASSERT on enabled build.

git-svn-id: ht...

b88b36bff53db53c15a6c7fde160882e165dc57c authored almost 6 years ago by Yonghong Song <[email protected]>

[BPF] do not generate unused local/global types

The kernel currently has a limit for # of types to be 64KB and
the size of string subsection to ...

2932b32f4e4f8056236f7cc3b6b8929e576e2149 authored almost 6 years ago by Yonghong Song <[email protected]>

[WebAssembly] Remove unused load/store patterns that use texternalsym

Differential Revision: https://reviews.llvm.org/D59395

git-svn-id: https://llvm.org/svn/llvm-pr...

a5cf8e0cbf048172792f491c025d2eed2aa079a8 authored almost 6 years ago by Sam Clegg <[email protected]>

AMDGPU: Remove intrinsic operand assert

Before r355981, this was under LLVM_DEBUG. I don't think the assert is
quite right, but this rea...

fab403b55c1fb99ee2a2398f4eea83a36b809dd3 authored almost 6 years ago by Matt Arsenault <[email protected]>

[CGP] add another bailout for degenerate code (PR41064)

This is almost the same as:
rL355345
...and should prevent any potential crashing from examples ...

f1180b0c1f975149eb3a0774efba8f957b6247af authored almost 6 years ago by Sanjay Patel <[email protected]>

Tighten up tests that use -debugify as a shortcut. NFC

These now verify that a given instruction has a specific source
location, rather than any old lo...

b1ceba26ca4c1c6571a64289d66e69f4796b5e28 authored almost 6 years ago by Paul Robinson <[email protected]>

[MC] Sort FDEs by the associated CIE before emitting them.

This isn't necessary according to the DWARF standard, but it matches the
.eh_frame sections emit...

a092a834c4ce9e7f3e31fbefb0d7bbaef033e275 authored almost 6 years ago by Eli Friedman <[email protected]>

MIR: Allow targets to serialize MachineFunctionInfo

This has been a very painful missing feature that has made producing
reduced testcases difficult...

d8706fcd747d2129b2c00045dd8d8191b115f26a authored almost 6 years ago by Matt Arsenault <[email protected]>

[AArch64][GlobalISel] Add isel support for G_UADDO on s32s and s64s

This adds instruction selection support for G_UADDO on s32s and s64s.

Also
- Add an instruction...

4a50374b480f6aa06cf8175b694395937eaad82f authored almost 6 years ago by Jessica Paquette <[email protected]>

[AArch64][GlobalISel] Implement selection for G_UNMERGE of vectors to vectors.

This re-uses the previous support for extract vector elt to extract the
subvectors.

Differentia...

2e9c70af234f95958585555e8faf692024bb6715 authored almost 6 years ago by Amara Emerson <[email protected]>

[AArch64][GlobalISel] Add some support for G_CONCAT_VECTORS.

Handles concatenating 2 x v2s32 and 2 x v4s16

Differential Revision: https://reviews.llvm.org/D...

751cb63424670a8c53e1dc937691af413eb4d772 authored almost 6 years ago by Amara Emerson <[email protected]>

[llvm-strip] Hook up (unimplemented) --only-keep-debug

For ELF, we accept but ignore --only-keep-debug. Do the same for llvm-strip.

COFF does implemen...

30e91d46e185a82e2421fd4b585ee39fe07aa534 authored almost 6 years ago by Jordan Rupprecht <[email protected]>

AMDGPU: Correct type for waitcnt debug flag

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356206 91177308-0d34-0410-b5e6-96231b3b...

487fd676cb65f1deb249748efc7e6f0eecba5e88 authored almost 6 years ago by Matt Arsenault <[email protected]>

Add test I forgot to git-add in r356163.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356205 91177308-0d34-0410-b5e6-96231b3b...

506dd368898c25d2de214ae2d99e97d42a3e8017 authored almost 6 years ago by Adrian Prantl <[email protected]>

Line wrap README file

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356204 91177308-0d34-0410-b5e6-96231b3b...

2b070724f790512935b129b14a4035e9ce8a8b12 authored almost 6 years ago by Sam Clegg <[email protected]>

[InstCombine] Add tests for range-based saturing math overflow; NFC

Tests for cases where overflow can be determined, but not based on
known bits.

git-svn-id: http...

d6add264d49e0f603803d76845bd3973df56ca7e authored almost 6 years ago by Nikita Popov <[email protected]>

[ARC] Add more load/store variants.

On ARC ISA, general format of load instruction is this:

LD<zz><.x><.aa><.di> a, [b,c]
And g...

48dc9cf87f3a93015ecccad29fcf36d22923a984 authored almost 6 years ago by Pete Couperus <[email protected]>

gn build: Add build files for clang-doc

Differential Revision: https://reviews.llvm.org/D59379

git-svn-id: https://llvm.org/svn/llvm-pr...

a41868aa77d86388c9f518c6a65f7810342c9678 authored almost 6 years ago by Nico Weber <[email protected]>

[InstCombine] remove duplicate tests

These got accidentally doubled with rL356191.

git-svn-id: https://llvm.org/svn/llvm-project/llv...

b8324661573d880417cfd2faefb4f14420e85d6b authored almost 6 years ago by Sanjay Patel <[email protected]>

Handle consecutive-double-quotes in Windows argument parsing

Windows command line argument processing treats consecutive double quotes
as a single double-quo...

981d59612678a915da12b98a72739bb7e19b3a09 authored almost 6 years ago by Sunil Srivastava <[email protected]>

[InstCombine] canonicalize funnel shift constant shift amount to be modulo bitwidth

The shift argument is defined to be modulo the bitwidth, so if that argument
is a constant, we c...

82311c6556ecbe61cc471d366c23f4ae8eb49504 authored almost 6 years ago by Sanjay Patel <[email protected]>

[InstCombine] add tests for funnel shift constant shift amount mod bitwidth; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356191 91177308-0d34-0410-b5e6-96231b3b...

74800bb68bc95e37b39d685f147e004976381764 authored almost 6 years ago by Sanjay Patel <[email protected]>

[MemorySSA] Remove redundant walker assignment [NFC].

Subscribers: llvm-commits

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356189 91177...

f63ee9026bec9f4f19a63b14e825ca53aec1ca6a authored almost 6 years ago by Alina Sbirlea <[email protected]>

[Tests] Add tests to demonstrate hoisting of unordered invariant loads

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356184 91177308-0d34-0410-b5e6-96231b...

d0d19c1992a6ee0ca8ff6f5f747a2a21ee2a1e76 authored almost 6 years ago by Philip Reames <[email protected]>

[Tests] Revert an accident change to a test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356183 91177308-0d34-0410-b5e6-96231b...

81c0530ed47c36dae505a4ec21435ec201a7bd8a authored almost 6 years ago by Philip Reames <[email protected]>

[GlobalISel][AArch64] Add partial selection support for G_INSERT_VECTOR_ELT

This adds support for inserting elements into packed vectors. It also adds
two tests: one for se...

1a446d1577d734d7e8f3e67ab8c72e9b6ced9a17 authored almost 6 years ago by Jessica Paquette <[email protected]>

Auto-generate an existing test to make it easier to update

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356181 91177308-0d34-0410-b5e6-96231b...

751d75d68309ba9fb2ddf49027f0344964ddfa46 authored almost 6 years ago by Philip Reames <[email protected]>

[ARC] Better classify add/sub immediate instructions in frame lowering.

Summary:
Some operations have multiple ARC instructions that are applicable.
For instance, "add ...

4385104c44f7189db633f82379f596dae90ff6e9 authored almost 6 years ago by Pete Couperus <[email protected]>

Speeding up llvm-cov export with multithreaded renderFiles implementation.

Summary:
CoverageExporterJson::renderFiles accounts for most of the execution time given a large...

3384c56bc0a6b2982282f8850af6c232ec98135e authored almost 6 years ago by Max Moroz <[email protected]>

[InstCombine] add tests for funnel shift constant shift amount mod bitwidth; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356175 91177308-0d34-0410-b5e6-96231b3b...

587de2cafa83c6b8589655dcf77f9b7cf0bd3bc5 authored almost 6 years ago by Sanjay Patel <[email protected]>

[Tests] Add tests for reordering of unordered atomics on invariant locations

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356172 91177308-0d34-0410-b5e6-96231b...

4411e545d04a718904059d75a0cabbc226dc2788 authored almost 6 years ago by Philip Reames <[email protected]>

Allow code motion (and thus folding) for atomic (but unordered) memory operands

Building on the work done in D57601, now that we can distinguish between atomic and volatile mem...

7747c1d2df876168611373f39f8513701f77e777 authored almost 6 years ago by Philip Reames <[email protected]>

[Tests] Add negative folding tests w/fences as requested in D59345

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356165 91177308-0d34-0410-b5e6-96231b...

3b4378582808382fd4abfb57b51ec6e2ce77ee4c authored almost 6 years ago by Philip Reames <[email protected]>

[X86] Fix the pattern changes from r356121 so that the ROR*r1/ROR*m1 pattern use the rotr opcode.

These instructions used to use rotl with a bitwidth-1 immediate. I changed the immediate to 1,
b...

13b61457d35a5d694e994b5b2e5050a11199af9a authored almost 6 years ago by Craig Topper <[email protected]>

Add IR debug info support for Elemental, Pure, and Recursive Procedures.

Patch by Eric Schweitz!

Differential Revision: https://reviews.llvm.org/D54043

git-svn-id: htt...

331d4e6ff2043153dd6a29e4f53b5c8ed05aca9b authored almost 6 years ago by Adrian Prantl <[email protected]>

[NFC][ARM] Update test

Change some regex to handle commutable instructions.

git-svn-id: https://llvm.org/svn/llvm-pr...

acbed856d27d6546b7cf69b91220c9b3af58ce50 authored almost 6 years ago by Sam Parker <[email protected]>

[x86] prevent infinite looping from vselect commutation (PR41066)

This is an immediate fix for:
https://bugs.llvm.org/show_bug.cgi?id=41066
...but as noted there ...

9afb620acffec194d77b531b372e8599a8cb1ebd authored almost 6 years ago by Sanjay Patel <[email protected]>

YAMLIO: Improve template arg deduction for mapOptional

Summary:
The way c++ template argument deduction works, both arguments are used
to deduce the te...

e287d6a791e06558575c29c1ba58123c9c0f49a2 authored almost 6 years ago by Pavel Labath <[email protected]>

Merge remote-tracking branch 'origin/swift-5.1-branch' into stable

ab94816b593daf1c623322b0fb981abb0b156833 authored almost 6 years ago by swift_jenkins <[email protected]>

AMDGPU: Scavenge register instead of findUnusedReg

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356149 91177308-0d34-0410-b5e6-96231b3b...

9ec5e55104dde136aac5f120cbfb6a1f7546c6b4 authored almost 6 years ago by Matt Arsenault <[email protected]>

GlobalISel: Use multiple returns for intrinsic structs

This is consistent with what SelectionDAG does and is much easier to
work with than the extract ...

c357f7eb2b610b8d5fb61e9bad52cd70d1797d0d authored almost 6 years ago by Matt Arsenault <[email protected]>

[SampleFDO] add suffix elision control for fcn names

Summary:
Add hooks for determining the policy used to decide whether/how
to chop off symbol 'suf...

002b63f0a3bc17dd34d4392f6622b3041d5af32e authored almost 6 years ago by Than McIntosh <[email protected]>

Note ImmArg in documentation for adding intrinsics

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356145 91177308-0d34-0410-b5e6-96231b3b...

32ff027088cf1d734a15cff2273a3d0c79a04d23 authored almost 6 years ago by Matt Arsenault <[email protected]>

ARM: Add ImmArg to intrinsics

I found these by asserting in clang for any GCCBuiltin that doesn't
require mangling and require...

496c1dd07c49d67874deefd8b19b01fa5da31e12 authored almost 6 years ago by Matt Arsenault <[email protected]>

AMDGPU: Don't add unnecessary convergent attributes

These are redundant with the intrinsic declaration.

git-svn-id: https://llvm.org/svn/llvm-proje...

c06a0f6ec2c5e71efbae73a1d275fb27186408e9 authored almost 6 years ago by Matt Arsenault <[email protected]>

gn build: Merge r356080

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356139 91177308-0d34-0410-b5e6-96231b3b...

d7620a3317c5b2cd26ecb995c7d9f1e2db95aba7 authored almost 6 years ago by Hans Wennborg <[email protected]>

[SystemZ] Remove icmp undef

Prep-work for PR40800 (Add UNDEF handling to SelectionDAG::FoldSetCC)

git-svn-id: https://llvm....

b85628fbc5c506773345b1387ca9c2e638f91327 authored almost 6 years ago by Simon Pilgrim <[email protected]>

[SystemZ] Regenerate tests to make complete codegen more obvious

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356137 91177308-0d34-0410-b5e6-96231b3b...

c69e0f0517d998aada49e7848f35a29b11a5d678 authored almost 6 years ago by Simon Pilgrim <[email protected]>

[llvm-objcopy]Don't implicitly strip sections in segments

This patch changes llvm-objcopy's behaviour to not strip sections that
are in segments, if they ...

d5ba5901b903e6fa04a632131eedf3101c489c81 authored almost 6 years ago by James Henderson <[email protected]>

Fix for buildbots

Remove unused private field.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356135 9...

b425d6d63ac80ca6f2a5c5942d48ae0f7b9cefd9 authored almost 6 years ago by Sam Parker <[email protected]>

Revert r356129 due to greendragon bot failures

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356133 91177308-0d34-0410-b5e6-96231b3...

2c597b63fe0f0dad93ecf3e8b2a28179e023b94c authored almost 6 years ago by James Henderson <[email protected]>

[ARM][ParallelDSP] Enable multiple uses of loads

When choosing whether a pair of loads can be combined into a single
wide load, we check that...

571398105ee6b5aa0927bb55441a1ff8791ca058 authored almost 6 years ago by Sam Parker <[email protected]>

[NFC][LSR] Cleanup Cost API

Create members for Loop, ScalarEvolution, DominatorTree,
TargetTransformInfo and Formula.

Diffe...

6273747bc3d183848ffc55fafd833200ce22058b authored almost 6 years ago by Sam Parker <[email protected]>

[ARM] Run ARMParallelDSP in the IRPasses phase

Run EarlyCSE before ParallelDSP and do this in the backend IR opt
phase.

Differential Revision:...

01f20a4ee2a218cec7d670a4e5fc04be6cf350aa authored almost 6 years ago by Sam Parker <[email protected]>

[llvm-objcopy]Don't implicitly strip sections in segments

This patch changes llvm-objcopy's behaviour to not strip sections that
are in segments, if they ...

e83676d5104ca4d90e404066ea4196a2488451f8 authored almost 6 years ago by James Henderson <[email protected]>

gn build: Merge r356082

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356128 91177308-0d34-0410-b5e6-96231b3b...

f012e914c827754dafe6e542056ab278061ae2e2 authored almost 6 years ago by Hans Wennborg <[email protected]>

Propagating prior merge from 'llvm.org/master'.

4e4ad9213b5edda82ea518a943a959480fafc389 authored almost 6 years ago by Automerger <Automerger@Swift>

[RISCV] Fix rL356123

The wrong version of the patch was committed. This fixes typos that broke the build.

git-svn-i...

ac0d6fee07540817c2e71f4b96280dcc7221be65 authored almost 6 years ago by Alex Bradbury <[email protected]>

[RISCV][NFC] Rename callee saved regs 'CSR' to CSR_ILP32_LP64 and minor RISCVRegisterInfo refactoring

The CSR renaming further prepares the way for an upcoming patch adding support for more
RISC-V A...

b216751ea8fcedf2ea7db2390ce6cf5862bc0428 authored almost 6 years ago by Alex Bradbury <[email protected]>

[RISCV] Extend test/CodeGen/RISCV/callee-saved-* to test getCalleePreservedRegs

Add a caller which exhausts regs then calls another function. This allows
getCalleePreservedRegs...

8125ab6f68f9990eec65f4acb743e8ffb7608193 authored almost 6 years ago by Alex Bradbury <[email protected]>

[X86] Add patterns for rotr by immediate to fix PR41057.

Prior to the introduction of funnel shift intrinsics we could count on rotate
by immediates pref...

6248ee71f83d81fa8f827f2c74f23e88ff399b9f authored almost 6 years ago by Craig Topper <[email protected]>

[X86] Add various test cases for PR41057. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356120 91177308-0d34-0410-b5e6-96231b3b...

b98d8ca15ff81418e0ab5c2ee5310f392f07c3ec authored almost 6 years ago by Craig Topper <[email protected]>

[MachineCombiner][NFC] Prevent dereferencing past-the-end object in an MRI container

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350896 91177308-0d34-0410-b5e6-96231b3b...

bd8d06b6a18cbe5706c7000fea7d1a133f354543 authored almost 6 years ago by Gerolf Hoflehner <[email protected]>

[GlobalISel][Utils] Add a getConstantVRegVal variant that looks through instrs

getConstantVRegVal used to only look for G_CONSTANT when looking at
unboxing the value of a vreg...

79ad8c5d8495f4e06c598b17c225ea3a60ecafe3 authored almost 6 years ago by Quentin Colombet <[email protected]>

Fixup tests to check for any MCInst number instead of a specific one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356115 91177308-0d34-0410-b5e6-96231b3b...

c8c4a422420860f7d11d080f0bf5969d2bb4ebbb authored almost 6 years ago by Douglas Yung <[email protected]>

[ResetMachineFunctionPass] Add visited functions statistics info

Adding a "NumFunctionsVisited" for collecting the visited function number.
It can be used to col...

8136aefd779ccd98470aa9ef6ffd5f38aaee9568 authored almost 6 years ago by Craig Topper <[email protected]>