LiveRanges represent the live-in range of a value as a sorted
list of intervals. Each interval s...

Each live range has an affinity hint containing the preferred register
class (or stack slot). Co...

On ISAs with no instruction predicates, just emit an unimplemented!()
stub for the check_instp()...

Like a vector, but with a tiny footprint, and allocated from a pool so
all memory can be release...

An SSA value is usually biased towards a specific register class or a
stack slot, depending on t...

These were found by the spellchecker.

The nightly compiler isn't able to compile rustfmt in 10 minutes. This causes Travis CI to termi...

The built rustfmt should be cached.

Try switching to Trusty to get a newer Python 3.

Try to go via python3-setuptools instead.

Then use pip3 to install dependencies.

The Python style enforcements are easy to miss otherwise.

Ensure that the set of register classes is closed under intersection.

Provide a RegClass::inter...

Every encoding recipe must specify register constraints on input and
output values.

Generate re...

This set of available register units also manages register aliasing in
an efficient way.

Detect...

Add a mechanism for defining sub-classes of register classes.

This has been superceded by PackedOption.

Clean up comments.

Add an assertion to check that PackedOption is working as designed.

Also rework the algorithm to be more robust against unreachable blocks.

- Add an is_reachable(e...

- Remove NO_VALUE and ExpandedValue::None.
- Remove the Default implelmentation for Value.
- Ins...

This was only used for the comment rewrite mechanism, and we can just
predict the next allocated...

This also revealed that the last_inst() method should return an Option.

The doubly linked lists are terminated with None.

Remove NO_EBB and the Default impl for Ebb.

Avoid NO_EBB.

These types can be wrapped in a PackedOption now, so we don't need the
NO_* constants and defaul...

Implement ReservedValue for all the entities.

The PackedOption<T> struct uses the same amount of memory as T, but can
represent None via a res...

This code is best tested with larger functions with more EBBs.
Perhaps a new file-test category ...

Make it possible to iterate backwards over the instructions in an EBB.

This requires the value number to be stored in the live range itself.

This is simply the slice iterator for the dense vector.

- map.values() returns an iterator with...

This implements the classic Briggs/Torczon sparse set construct.

Adapt it to our existing Entit...

We will track live ranges separately for each SSA value, rather than per
virtual register like L...

The ProgramOrder::cmp() comparison is often used where one or both
arguments are statically know...

Assign sequence numbers to both instructions and EBB headers such that
their relative position c...

Program points are used to represent a linear position in a function.
Thus will be used for the ...

This table holds the result of register allocation.

Python coding style is verified by the lib/cretonne/meta/check.sh script
which is not run as par...

for InstructionData. Use generated `is_terminator()` for `Opcode`
instead. `is_terminator`, `can...

generate `is_branch`, `is_terminator`, `can_trap` methods for `enum
Opcode`.

The intel, arm32, and arm32 targets were only defined in the meta
language previously. Add Rust ...

Use the information in the ISA's registers.py files to generate a
RegInfo Rust data structure.

Add a RegBank class for describing CPU register banks.

Define register banks for all the ISA st...

- is_power_of_two
- next_power_of_two

Make sure we run doctests on these functions.

The Intel ISA handles both 32-bit and 64-bit code.

ARM is split into separate arm32 and arm64 I...

Use the inferred type variables to construct a type argument for builder
methods. This is for th...

Expand foo_imm into iconst + foo.

Generate a Rust expression that computes the value of a derived type
variable.

Each instruction used in a pattern has constraints on the types of its
operands. These constrain...

This reduces the set of types a type variable can assume.

This implementation is not complete y...

Strips out any type variable copies from an expression.

Add TypeVar constants representing the available type functions, and a
TypeVar.derived() static ...

A few operands have a fixed type assigned. Create a singleton type
variable for these exceptions...

The cretonne package is now split into two: cdsl and base.

- cdsl.instructions defines the Instruction class.
- base.instructions defines the base instruct...

- cdsl.ast defines classes representing abstract syntax trees.
- cdsl.xform defines classes for ...

- cdsl.formats provides classes for describing instruction formats.
- base.formats provides conc...

This method caused lots of import cycles when type checking.

Use isinstance() in the Operand co...

- cdsl.typevar defines TypeVar and TypeSet classes.

- base.formats defines instruction formats.
- base.entities defines kinds of entity references.
...

- cdsl.operands has the Operand and OperandKind classes.

- cdsl.predicates defines classes for describing predicates.
- cdsl.settings defines classes for...

We want to separate the Python classes that make up the DSL used to
define the Cretonne language...

Add an assertion for the value placements that we don't support yet.

1. A primary result in the...

Since we're deconstructing an instruction anyway, go ahead and resolve
any value aliases on its ...

If a secondary value in the source pattern becomes a primary value in
the destination pattern, i...

When the extended_values table is empty, the value to resolve is
definitely not an alias, but we...

If an instruction uses any values that are aliases of other values,
print out the alias mappings...

Provide a generic way of accessing the value arguments on an
instruction. This is provided as tw...

Utility functions for converting &T to an &[T] slice with a single
element.

When expanding iadd_cout, the original instruction is replaced with an
iadd, and an icmp is inse...

Include the test file preamble comments when building a filecheck
instance for every function in...

Comments preceding the first function are not associated with any
specific entity in the file. P...

When an illegal instruction is replaced with other instructions, back up
and revisit the expande...

Make it possible to move a cursor to a new position.

In the current implementation of Layout an...

RISC-V 32-bit tests for band.i64, bor.i64, bxor.i64.

When an instruction can't be encoded, provide a viable legalization
action in the form of a Lega...

When it is known that a value is the first result of an instruction, it
is safe to unwrap the in...

Begin emitting legalization patterns in the form of two functions,
'expand' and 'narrow' that ar...

When a Var is used in an XForm, it can be defined in the src or dst or
both patterns, and it is ...